implementation of Random Boolean network inn Verilog

A Random Boolean Network consists of N randomly connected nodes, each of which has a binary state: on or off (1 or 0). In NK networks every node receives exactly K inputs chosen randomly from other nodes in the network and in most cases self-connection is allowed (Figure 1 shows an example of the topology of an RBN).

The state of each node in the network at time t+1 is determined by the states of its inputs at time t through a randomly generated Boolean function which can be represented with a look-up table for each node (see Table 1). Typically the Boolean functions do not change throughout the lifetime of the network. In an RBN the Boolean function for each node maps each of the 2K possible input combinations to an output state of 0 or 1.

The network is given a random initial state by assigning each node a value of 0 or 1. The value of each node at the next time step is determined using the state of its inputs and each node's Boolean function. All nodes are updated at the same time (synchronously). The new state of the network is generated and then used to determine the next state and so on. An example of the network activity is displayed in Figure .

i realy want to implement this in verilog. any one can give me some detaile about RBN