How to generate random numbers in FPGA for use as IV in cryptographic applications

I am looking for a way to generate random numbers in FPGA for use as an IV for cryptographic applications. However, the answers to similar questions i found on Stackoverflow so far generate random numbers from a "Fixed SEED" which is not at all suitable for a cryptographic application. Pointers to two of such answers are as follows:-

Random number generation on Spartan-3E and How to generate pseudo random number in FPGA?

Hope to get some helpful answers in this regard from the community! Thanks