Random number generator using $dist_uniform in SystemVerilog

I am trying to generate a random number using the $dist_uniform using Quartus and ModelSim.

The relevant code section is as follows (within a loop):

rand= $dist_uniform(10,20,25);
rand_test=$random;

'rand' is always 20 while 'rand_test' is varied on every iteration.

Would appreciate any advice on the matter.

I have tried many variations of the $dist_uniform as well as other distributions as well - the only way I have succeeded to generate a random number is by the $random command