mardi 7 septembre 2021

$urandom don't generate any numbers

Main goal of this module is to generate output impuls on in random moment. When I launch simulation module behave fine, but were i'm implementing it on board (BASYS 3) $urandom doesn't generate any numbers and my machine stay in SHOT state. It is posible that $urandom works only in simulation but not on the board ? My module looks like:

`timescale 1 ns / 1 ps

module random_shoot_gen
(
    input wire pclk,
    input wire rst,

    output reg on
);


    localparam COUNTER_LIMIT = 3000;           

    localparam IDLE = 2'b00;
    localparam SHOT = 2'b01;
    localparam WAIT = 2'b10;

    reg [1:0] state = 0;
    reg [1:0] state_nxt = 0; // machine start form IDLE satte
    reg on_nxt = 0;
    reg [25:0] counter = 0;
    reg [25:0] counter_nxt = 0;

    reg [25:0] s_time = 0;
    reg [25:0] s_time_nxt = 0; 

    reg [6:0] rd = 0;
    reg [6:0] rd_nxt = 0; 

// ---------------------------------------
// state register

  always @(posedge pclk) begin
      state <= state_nxt;
      on <= on_nxt;
      counter <= counter_nxt;
      rd <= $urandom%20;
      s_time <= s_time_nxt;
  end

// ---------------------------------------
// next state logic
  always @(state or counter or s_time) begin
    case(state)
      IDLE:begin
        if(counter >= COUNTER_LIMIT) begin
            state_nxt = SHOT;
            counter_nxt = 0;
        end
        else begin
            state_nxt = IDLE;
            counter_nxt = counter + 1;
        end
      end
      SHOT:begin
        counter_nxt = 0;
        if (rd > 1)begin
          state_nxt = WAIT;
        end
        else begin
          state_nxt = IDLE;
        end   
      end
      WAIT:begin // to provide enaught widht on on signal
        if(s_time >= 20) begin
            state_nxt = IDLE;
            s_time_nxt = 0;
        end
        else begin
            state_nxt = WAIT;
            s_time_nxt = s_time + 1;
        end  
      end
    endcase
  end

  always @* begin
    case(state)
      IDLE:
        begin
            on_nxt = 0;
        end
      SHOT:
        begin
            on_nxt = 0;
        end
      WAIT:
        begin
            on_nxt = 1;
        end
    endcase
  end
endmodule



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